[PATCH 1/2] Documentation: openrisc: Update mailing list
#MainlineFrom:Stafford Horne <shorne@gmail.com>
Date:
Message-ID:<20250417080236.4021257-2-shorne@gmail.com>
Patch:v1 · 1/2
Language:Mixed
Patch-ID:c73ad40f501c5b189ec84b08fb44ad2dbc371310
Files:
Documentation/arch/openrisc/openrisc_port.rstDocumentation/translations/zh_CN/arch/openrisc/openrisc_port.rstDocumentation/translations/zh_TW/arch/openrisc/openrisc_port.rstLinks:lore message ↗ · raw mail ↗
Patch content 3 changed files
The librecores.org mailing list was replaced with vger.kernel.org lastyear after the old mail server went offline. Update the docs to reflectthe new list. Signed-off-by: Stafford Horne <shorne@gmail.com>--- Documentation/arch/openrisc/openrisc_port.rst | 6 +++--- .../translations/zh_CN/arch/openrisc/openrisc_port.rst | 6 +++--- .../translations/zh_TW/arch/openrisc/openrisc_port.rst | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/Documentation/arch/openrisc/openrisc_port.rst b/Documentation/arch/openrisc/openrisc_port.rstindex 1565b9546e38..a31ae4960576 100644--- a/Documentation/arch/openrisc/openrisc_port.rst+++ b/Documentation/arch/openrisc/openrisc_port.rst@@ -7,10 +7,10 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k). For information about OpenRISC processors and ongoing development: - ======= =============================+ ======= ============================== website https://openrisc.io- email openrisc@lists.librecores.org- ======= =============================+ email linux-openrisc@vger.kernel.org+ ======= ============================== --------------------------------------------------------------------- diff --git a/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst b/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rstindex cadc580fa23b..d2e4ca8a46c7 100644--- a/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst+++ b/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst@@ -17,10 +17,10 @@ OpenRISC 1000系列(或1k)。 关于OpenRISC处理器和正在进行中的开发的信息: - ======= =============================+ ======= ============================== 网站 https://openrisc.io- 邮箱 openrisc@lists.librecores.org- ======= =============================+ 邮箱 linux-openrisc@vger.kernel.org+ ======= ============================== --------------------------------------------------------------------- diff --git a/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst b/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rstindex 422fe9f7a3f2..86590b016d56 100644--- a/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst+++ b/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst@@ -17,10 +17,10 @@ OpenRISC 1000系列(或1k)。 關於OpenRISC處理器和正在進行中的開發的信息: - ======= =============================+ ======= ============================== 網站 https://openrisc.io- 郵箱 openrisc@lists.librecores.org- ======= =============================+ 郵箱 linux-openrisc@vger.kernel.org+ ======= ============================== --------------------------------------------------------------------- -- 2.47.0